(Processing Systems Lab)

Naveen John

Naveen received his B.Tech in Electronics and Communication Engineering from National Institute of Technology Karnataka (NITK), Surathkal, India in 2016. He is currently a Masters student at University of Washington, Seattle with his research focusing on switched capacitor DC-DC converters. In 2015 he interned at Universit├Ąt Paderborn, Paderborn, Germany and currently works part-time for Synopsys Inc. as an Analog and Mixed Signal Layout Design Engineer working on developing layout methodologies in advanced FinFET nodes (7nm and below).